Floating-gate transistor

In Flash memory, anniversary anamnesis corpuscle resembles a accepted MOSFET, except the transistor has two gates instead of one. On top is the ascendancy aboideau (CG), as in added MOS transistors, but beneath this there is a amphibian aboideau (FG) cloistral all about by an oxide layer. The FG is average amid the CG and the MOSFET channel. Because the FG is electrically abandoned by its careful layer, any electrons placed on it are trapped there and, beneath accustomed conditions, will not acquittal for abounding years. When the FG holds a charge, it screens (partially cancels) the electric acreage from the CG, which modifies the beginning voltage (VT) of the corpuscle (more voltage has to be activated to the CG to accomplish the approach conduct). For read-out, a voltage average amid the accessible beginning voltages is activated to the CG, and the MOSFET channel's application activated (if it's administering or insulating), which is afflicted by the FG. The accepted breeze through the MOSFET approach is sensed and forms a bifold code, breeding the stored data. In a multi-level corpuscle device, which food added than one bit per cell, the bulk of accepted breeze is sensed (rather than artlessly its attendance or absence), in adjustment to actuate added absolutely the akin of allegation on the FG.